One key element in paging is that it should cover a great geographical area with simultaneous transmission so that transmitters won't block or cancel each other. This technique was in use in the commercial paging network where some of the equipment used in our system originate, but we were dumb enough to discard all the material, equipment or even knowledge available when we got the transmitters. We were just looking at great PA's for 144 MHz, not actually paging transmitters where we ended up using them after a decade :)
The simulcasting technology is known and we know how we should do it, but as the infrastructure design differs quite much from the original network which was apparently synchronous till certain level, we need to do transmitter synchronizing differently. To enable simulcast, ie. multiple transmitters transmitting simultaneously on the same frequency, we need to achieve synchronization between the transmitters. Again, Hessu OH7LZB has done great job programming a PLL to the Arduino POCSAG encoder interfacing the actual POCSAG transceiver to the host controller computer. The PLL will lock to the master transmitter's special preamble sequence to achieve phase lock with it and then send out the messages in synchronous manner. This design is planned geocraphically so that there is a master transmitter in the middle, surrounded by slave transmitters.
Last week at Kauniainen Radio Club weekly club meeting, the PLL was tested initially and results were promising, the PLL locked to the test transmitter as expected.
The simulcasting technology is known and we know how we should do it, but as the infrastructure design differs quite much from the original network which was apparently synchronous till certain level, we need to do transmitter synchronizing differently. To enable simulcast, ie. multiple transmitters transmitting simultaneously on the same frequency, we need to achieve synchronization between the transmitters. Again, Hessu OH7LZB has done great job programming a PLL to the Arduino POCSAG encoder interfacing the actual POCSAG transceiver to the host controller computer. The PLL will lock to the master transmitter's special preamble sequence to achieve phase lock with it and then send out the messages in synchronous manner. This design is planned geocraphically so that there is a master transmitter in the middle, surrounded by slave transmitters.
Last week at Kauniainen Radio Club weekly club meeting, the PLL was tested initially and results were promising, the PLL locked to the test transmitter as expected.
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https://allstarlink.org/voter.html
I hope to have a decode and encode POCSAG system up as well. Once the Voting/Timed Simulcast broad is up and running I'll use it.
David KE6UPI
dshaw@ke6upi.com
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